Process Flow
Flip Chip Assembly Contents
Flip chip assembly offers optimized electrical performance in addition to optimized miniaturization. Die in flip chip format also demonstrate extremely high assembly yiel ds, resulting mostly from the self-alignment properties of the reflow process. However, the opportunity to control signal integrity from the die through the substrate to other die on the substrate or even packaged die on the substrate may provide the most significant benefit of flip chip assemblies.
Peripheral I/O
The variety of substrates available for Flip Chip applications allows a wide selection of electrical, thermal, CTE and mechanical properties tailored to specific application requirements. Ceramics and glass ceramics offer stable dielectric constant, low dielectric loss tangent and good thermal dissipation. Organic substrates can provide low dielectric constant and light weight as well as, in many cases, low cost. Routing density is also a crucial component of substrate selection.
The Flip Chip assembly process flow consists of four essential steps; die bumping, die attach, interconnect and underfill. Bumping is generally provided by either the die supplier or a contract-bumping house. Die attach and interconnect provides the mechanical and electrical connection of the die to the substrate and wiring pattern on the substrate simultaneously. The surface tension of molten solder wetting the pad on the substrate provides self alignment between the bumps on the die and the land pads on the substrate. The die placement must ensure at least 30-50 % overlap of the appropriate substrate pad by the correct bump on the die. Flip Chip bonding requires a flux application to pads on the substrate in order to ensure strong bonds as well as high production yields. Particular process characteristics and considerations for Flip Chip assembly detailed in the next page should prove helpful in understanding how to select and specify product applications.